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| a 0.5 CMOS 1.8 V to 5.5 V 2:1 Mux/SPDT Switches ADG819/ADG820 FUNCTIONAL BLOCK DIAGRAM ADG819/ ADG820 S2 D S1 IN SWITCHES SHOWN FOR A LOGIC "1" INPUT FEATURES Low On Resistance 0.8 Max at 125 C 0.25 Max On Resistance Flatness 1.8 V to 5.5 V Single Supply 200 mA Current Carrying Capability Automotive Temperature Range: -40 C to +125 C Rail-to-Rail Operation 6-Lead SOT-23 Package, 8-Lead SOIC Package, and 6-Bump MicroCSP (Micro Chip Scale Package) ADG819 Fast Switching Times Typical Power Consumption (<0.01 W) TTL-/CMOS-Compatible Inputs Pin Compatible with the ADG719 (ADG819) APPLICATIONS Power Routing Battery-Powered Systems Communication Systems Data Acquisition Systems Cellular Phones Modems PCMCIA Cards Hard Drives Relay Replacement GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG819 and the ADG820 are monolithic, CMOS, SPDT (single-pole, double-throw) switches. These switches are designed on a submicron process that provides low power dissipation yet gives high switching speed, low On resistance, and low leakage currents. Low power consumption and an operating supply range of 1.8 V to 5.5 V make the ADG819 and ADG820 ideal for battery-powered, portable instruments. Each switch of the ADG819 and the ADG820 conducts equally well in both directions when on. The ADG819 exhibits breakbefore-make switching action, thus preventing momentary shorting when switching channels. The ADG820 exhibits make-beforebreak action. The ADG819 and the ADG820 are available in a 6-lead SOT-23 package and an 8-lead SOIC package. The ADG819 is also available in a 2 x 3 bump 1.14 mm x 2.18 mm MicroCSP package. This chip occupies only a 1.14 mm x 2.18 mm area, making it the ideal candidate for space-constrained applications. 1. Very low ON resistance, 0.5 typical 2. 1.8 V to 5.5 V single-supply operation 3. High current carrying capability 4. Tiny 6-lead SOT-23 package, 8-lead SOIC package, and 2 x 3 bump 1.14 mm x 2.18 mm MicroCSP package (ADG819 only) REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002 ADG819/ADG820-SPECIFICATIONS1 (V Parameter ANALOG SWITCH Analog Signal Range ON Resistance (RON) ON Resistance Match Between Channels (RON) ON Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS ADG819 tON tOFF Break-Before-Make Time Delay, tBBM ADG820 tON tOFF Make-Before-Break Time Delay, tMBB Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD NOTES 1 Temperature range is as follows: -40C to +125C. 2 ON resistance parameters tested with I S = 10 mA. 3 Guaranteed by design, not subject to production test. Specifications subject to change without notice. 3 DD = 5V 10%, GND = 0 V.) Unit V typ max typ max typ max nA typ nA max nA typ nA max V min V max A typ A max pF typ VIN = VINL or VINH Test Conditions/Comments 25 C -40 C to -40 C to +85 C +125 C2 0 V to VDD 0.5 0.6 0.06 0.08 0.1 0.17 0.01 0.25 0.01 0.25 0.7 0.8 VS = 0 V to VDD, IS = 100 mA; Test Circuit 1 VS = 0 V to VDD, IS = 100 mA VS = 0 V to VDD, IS = 100 mA VDD = 5.5 V VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = VD = 1 V, or VS = VD = 4.5 V; Test Circuit 3 0.1 0.2 0.12 0.25 3 3 10 25 2.0 0.8 0.005 0.1 5 35 45 10 16 5 50 18 55 21 1 ns typ ns max ns typ ns max ns typ ns min ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ RL = 50 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS1 = VS2 = 3 V; Test Circuit 5 RL = 50 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 0 V; Test Circuit 6 VS = 2.5 V, RS = 0 , CL = 1 nF; Test Circuit 7 RL = 50 , CL = 5 pF, f = 100 kHz; Test Circuit 8 RL = 50 , CL = 5 pF, f = 100 kHz; Test Circuit 10 RL = 50 , CL = 5 pF; Test Circuit 9 f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V 10 18 26 40 15 20 -71 -72 17 80 300 20 45 22 50 1 0.001 1.0 2.0 A typ A max -2- REV. 0 ADG819/ADG820 SPECIFICATIONS1(V Parameter ANALOG SWITCH Analog Signal Range ON Resistance (RON) ON Resistance Match Between Channels (RON) DD = 2.7 V to 3.6 V, GND = 0 V.) 25 C -40 C to -40 C to +85 C +125 C2 0 V to VDD 0.7 1.4 0.06 0.13 0.13 0.25 0.01 0.25 0.01 0.25 1.5 1.6 Unit V typ max typ max typ nA typ nA max nA typ nA max V min V max A typ A max pF typ VIN = VINL or VINH Test Conditions/Comments VS = 0 V to VDD, IS = 100 mA; Test Circuit 1 VS = 0 V to VDD, IS = 100 mA VS = 0 V to VDD, IS = 100 mA VDD = 3.6 V VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2 VS = VD = 1 V, or VS = VD = 3.3 V; Test Circuit 3 ON Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS ADG819 tON tOFF Break-Before-Make Time Delay, tBBM ADG820 tON tOFF Make-Before-Break Time Delay, tMBB Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD NOTES 1 Temperature range is as follows: -40C to +125C. 2 ON resistance parameters tested with I S = 10 mA. 3 Guaranteed by design, not subject to production test. Specifications subject to change without notice. 3 3 3 10 25 2.0 0.8 0.005 0.1 5 40 60 10 16 40 65 18 70 21 1 ns typ ns max ns typ ns max ns typ ns min ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ RL = 50 , CL = 35 pF, VS = 1.5 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 1.5 V; Test Circuit RL = 50 , CL = 35 pF, VS1 = VS2 = 1.5 V; Test Circuit 5 RL = 50 , CL = 35 pF, VS = 1.5 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 1.5 V; Test Circuit 4 RL = 50 , CL = 35 pF, VS = 1.5 V; Test Circuit 6 VS = 1.5 V, RS = 0 , CL = 1 nF; Test Circuit 7 RL = 50 , CL = 5 pF, f = 100 kHz; Test Circuit 8 RL = 50 , CL = 5 pF, f = 100 kHz; Test Circuit 10 RL = 50 , CL = 5 pF; Test Circuit 9 f = 1 MHz f = 1 MHz VDD = 3.6 V Digital Inputs = 0 V or 3.6 V 20 35 30 45 10 10 -71 -72 17 80 300 40 50 45 55 1 0.001 1.0 2.0 A typ A max REV. 0 -3- ADG819/ADG820 ABSOLUTE MAXIMUM RATINGS 1 (TA = 25C, unless otherwise noted.) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V Analog Inputs2 . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V or . . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First Digital Inputs2 . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V or . . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA . . . . . . . . . . . . . . . . (Pulsed at 1 ms, 10% Duty Cycle Max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . 200 mA Operating Temperature Range Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Automotive . . . . . . . . . . . . . . . . . . . . . . . . -40C to +125C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150C SOIC Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44C/W SOT-23 Package (4-Layer Board) JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 119C/W MicroCSP Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . TBD Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . 300C IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . 235C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. Table I. Truth Table for the ADG819/ADG820 IN 0 1 Switch S1 ON OFF Switch S2 OFF ON PIN CONFIGURATIONS 6-Lead SOT-23 (RT-6) 8-Lead SOIC (RM-8) 2 3 MicroCSP TOP VIEW (BUMPS AT THE BOTTOM) NOT TO SCALE IN 1 VDD 2 6 S2 D ADG819/ ADG820 D1 S1 2 GND 3 8 S2 NC 5 TOP VIEW GND 3 (Not to Scale) 4 S1 ADG819/ ADG820 S2 1 IN 6 7 TOP VIEW 6 IN (Not to Scale) 5 NC VDD 4 NC = NO CONNECT D 2 VDD 5 S1 3 GND 4 ADG819 ONLY ORDERING GUIDE Model Option ADG819BRM ADG819BRT ADG819BCB ADG820BRM ADG820BRT Temperature Range -40C to +125C -40C to +125C -40C to +85C -40C to +125C -40C to +125C Brand1 SNB SNB SNB SPB SPB Package Description SOIC (MicroSmall Outline IC) SOT-23 (Plastic Surface-Mount) MicroCSP (Micro Chip Scale Package) SOIC (MicroSmall Outline IC) SOT-23 (Plastic Surface-Mount) Package RM-8 RT-62 CB-62 RM-8 RT-62 NOTES 1 Branding on these packages is limited to three characters due to space constraints. 2 Contact factory for availability. -4- REV. 0 ADG819/ADG820 TERMINOLOGY VDD GND IDD S D IN RON RON RFLAT(ON) IS (OFF) ID, IS (ON) VD (VS) VINL VINH IINL(IINH) CS (OFF) CD, CS (ON) tON tOFF tBBM tMBB Charge Injection Crosstalk OFF Isolation Bandwidth ON Response Insertion Loss Most Positive Power Supply Potential Ground (0 V) Reference Positive Supply Current Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input Ohmic Resistance between D and S ON Resistance Match between Any Two Channels, i.e., RON max - RON min Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over the specified analog signal range. Source Leakage Current with the Switch OFF Channel Leakage Current with the Switch ON Analog Voltage on Terminals D, S Maximum Input Voltage for Logic "0" Minimum Input Voltage for Logic "1" Input Current of the Digital Input OFF Switch Source Capacitance ON Switch Capacitance Delay between applying the digital control input and the output switching ON. Delay between applying the digital control input and the output switching OFF. OFF time or ON time measured between the 90% points of both switches when switching from one address state to another. ON time measured between the 80% points of both switches when switching from one address state to another. A measure of the glitch impulse transferred from the digital input to the analog output during switching. A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an OFF switch. Frequency at which the output is attenuated by -3 dB. Frequency Response of the ON Switch Loss due to the ON Resistance of the Switch CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG819/ ADG820 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. 0 -5- ADG819/ADG820 -Typical Performance Characteristics 1.0 TA = 25 C 0.9 0.8 0.7 ON RESISTANCE - 1.0 VDD = 3V VDD = 2.7V 0.8 TA = +85 C ON RESISTANCE - TA = +125 C VDD = 3V 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 VD, VS - V 4 5 VDD = 3.3V VDD = 4.5V VDD = 5V VDD = 5.5V 0.6 0.4 TA = +25 C TA = -40 C 0.2 0 0 0.5 1.0 1.5 VD, VS - V 2.0 2.5 3.0 TPC 1. ON Resistance vs. VD (VS) TPC 4. ON Resistance vs. VD (VS) for Different Temperatures 10 TA = 25 C 9 VDD = 1.8V 8 7 ON RESISTANCE - ON RESISTANCE - 1.0 VDD = 5V 0.8 TA = +125 C 0.6 TA = +85 C 6 5 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.4 TA = +25 C TA = -40 C 0.2 0 0 1 2 VD, VS - V 3 4 5 VD, VS - V TPC 2. ON Resistance vs. VD (VS) TPC 5. ON Resistance vs. VD (VS) for Different Temperatures 10 VDD = 3V, 5V 8 50 40 LEAKAGE CURRENTS - nA tON 6 VDD = 3V VDD = 5V 4 ID, IS (ON) 2 TIME - ns 30 20 0 IS (OFF) 10 tOFF VDD = 3V, 5V -2 0 20 40 60 80 100 120 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE - C TEMPERATURE - C TPC 3. Leakage Currents vs. Temperatures TPC 6. tON/tOFF Times vs. Temperature (ADG819) -6- REV. 0 ADG819/ADG820 250 TA = 25 C 200 150 100 VDD = 5V 50 VDD = 3V 0 -50 ATTENUATION - dB -1 -2 -3 -4 -5 -6 0.2 0 1 VDD = 3V, 5V TA = 25 C CHARGE INJECTION - pC -100 -150 -200 0 0.5 1.0 1.5 2.0 2.5 VS - V 3.0 3.5 4.0 4.5 5.0 1 FREQUENCY - MHz 10 30 TPC 7. Charge Injection vs. Source Voltage TPC 10. ON Response vs. Frequency VDD = 5V, 3V -10 TA = 25 C -20 ATTENUATION - dB LOGIC THRESHOLD VOLTAGE - V 0 1.8 TA = 25 C 1.6 1.4 RISING 1.2 FALLING 1.0 0.8 0.6 0.4 0.2 0 -30 -40 -50 -60 -70 -80 -90 0.1 FREQUENCY - MHz 1 2 0 1 2 3 VDD - V 4 5 6 TPC 8. OFF Isolation vs. Frequency TPC 11. Logic Threshold vs. Supply Voltage 0 -10 -20 ATTENUATION - dB -30 -40 -50 -60 -70 -80 -90 0.1 FREQUENCY - MHz 1 2 TPC 9. Crosstalk vs. Frequency REV. 0 -7- ADG819/ADG820 Test Circuits IDS V1 S VS D IS (OFF) S VS D ID (OFF) NC VD ID (ON) S D VD RON = V1 / IOS NC = NO CONNECT Test Circuit 1. ON Resistance Test Circuit 2. OFF Leakage Test Circuit 3. ON Leakage VDD 0.1 F VDD VIN VOUT 50% 90% 50% 90% VS IN GND RL 50 CL 35pF t ON t OFF Test Circuit 4. Switching Times VDD 0.1 F VDD VS1 VS2 S1 S2 IN VIN GND D RL 50 VOUT CL 35pF VIN VOUT 0V 90% 0V 50% 90% 50% t BBM t BBM Test Circuit 5. Break-Before-Make Time Delay, tBBM (ADG819 Only) VDD 0.1 F VIN VS1 VD IN VIN GND VS2 RL2 300 CL2 35pF RL1 300 CL1 35pF VS1 VS2 50% 50% 80% VD VDD 0V 90% 80% VD t MBB Test Circuit 6. Make-Before-Break Time Delay, tMBB (ADG820 Only) -8- REV. 0 ADG819/ADG820 VDD VOUT VDD RS VS IN GND CL 1nF VOUT SW OFF VIN SW ON SW ON SW OFF SW OFF QINJ = CL VOUT SW OFF VOUT VIN Test Circuit 7. Charge Injection VDD 0.1 F VDD IN S 50 D GND VIN OFF ISOLATION = 20 LOG NETWORK ANALYZER 50 VS VOUT RL 50 VOUT VS Test Circuit 8. OFF Isolation VDD 0.1 F VDD IN S D GND VIN NETWORK ANALYZER 50 VS VOUT RL 50 INSERTION LOSS = 20 LOG VOUT WITH SWITCH VOUT WITHOUT SWITCH Test Circuit 9. Bandwidth VDD 0.1 F NETWORK ANALYZER VOUT RL 50 50 VS S1 VDD D S2 R 50 IN GND VOUT VS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG Test Circuit 10. Channel-to-Channel Crosstalk REV. 0 -9- ADG819/ADG820 OUTLINE DIMENSIONS 6-Lead Plastic Surface-Mount Package (RT-6) Dimensions shown in inches and (mm) 0.1220 (3.10) 0.1063 (2.70) 6 5 4 0.0709 (1.80) 0.0591 (1.50) 1 2 3 0.1181 (3.00) 0.0984 (2.50) PIN 1 0.0748 (1.90) BSC 0.0512 (1.30) 0.0354 (0.90) 0.0374 (0.95) BSC 0.0571 (1.45) 0.0354 (0.90) 10 0 0.0197 (0.50) SEATING 0.0091 (0.23) 0.0098 (0.25) PLANE 0.0031 (0.08) 0.0059 (0.15) 0.0000 (0.00) COPLANARITY 0.0217 (0.55) 0.0138 (0.35) 8-Lead SOIC Package (RM-8) Dimensions shown in inches and (mm) 0.1220 (3.10) 0.1142 (2.90) 8 5 0.1220 (3.10) 0.1142 (2.90) 1 4 0.1988 (5.05) 0.1870 (4.75) PIN 1 0.0256 (0.65) BSC 0.1201 (3.05) 0.1118 (2.84) COPLANARITY 0.0059 (0.15) 0.0020 (0.05) 0.0429 (1.09) 0.0370 (0.94) 0.0181 (0.46) 0.0079 (0.20) 0.0110 (0.28) 0.0031 (0.08) 0.1201 (3.05) 0.1118 (2.84) 33 27 SEATING PLANE 0.0280 (0.71) 0.0161 (0.41) 2 x 3 Array for MicroCSP (CB-6) Dimensions shown in millimeters and (inches) 0.67 (0.0264) 0.57 (0.0224) 0.47 (0.0185) SEATING PLANE 0.32 (0.0126) 0.32 (0.0126) NOM 1.34 (0.0528) 1.14 (0.0449) 0.94 (0.0370) 0.44 (0.0173) 0.36 (0.0142) 0.28 (0.0110) PIN 1 IDENTIFIER 2.38 (0.0937) 2.18 (0.0858) 1.98 (0.0780) 0.50 (0.0197) BALL PITCH 0.59 (0.0232) 0.24 (0.0094) 0.22 (0.0087) COPLANARITY 0.20 (0.0079) 0.50 (0.0860) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN -10- REV. 0 -11- -12- C02801-0-5/02(0) PRINTED IN U.S.A. |
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